[9300] in cryptography@c2.net mail archive
Re: chip-level randomness?
daemon@ATHENA.MIT.EDU (Sandy Harris)
Sat Sep 15 13:07:01 2001
Message-ID: <3BA341C1.4FC395A@storm.ca>
Date: Sat, 15 Sep 2001 07:55:45 -0400
From: Sandy Harris <sandy@storm.ca>
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To: cryptography@wasabisystems.com
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"R. A. Hettinga" wrote:
>
> I'm rooting around for stuff on hardware random number generation.
RFC 1750 is a standard reference. There's a draft of a rewrite on ietf.org.
> More specificially, I'm looking to see if anyone has done any
> entropy-collection at the chip-architecture level as part of the logic of a
> chip.
>
> I saw somewhere the intel had done it as part of the Pentium, for instance,
> but I can't find out whether it's an actual entropy collector, or just a
> PRNG.
http://www.cryptography.com/intelRNG.pdf
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