[532] in linux-scsi channel archive
Re: PLEASE READ!! -- frustrating EISA-bus / SCSI-controller problems (fwd)
daemon@ATHENA.MIT.EDU (Jarrett Redd)
Sun Aug 20 01:32:31 1995
From: Jarrett Redd <redd@pat.mdc.com>
To: linux-scsi@vger.rutgers.edu
Date: Sat, 19 Aug 1995 18:24:07 -0500 (CDT)
Forwarded message:
> From lnz@dandelion.com Sat Aug 19 12:38 CDT 1995
> Date: Sat, 19 Aug 1995 10:38:23 -0700
> From: "Leonard N. Zubkoff" <lnz@dandelion.com>
> Message-Id: <199508191738.KAA01347@dandelion.com>
> To: redd@pat.mdc.com
> Cc: linux-scsi@vger.rutgers.edu
> In-Reply-To: <199508190519.AAA07715@pat.mdc.com> (message from Jarrett Redd on Sat, 19 Aug 1995 00:19:59 -0500)
> Subject: Re: PLEASE READ!! -- frustrating EISA-bus / SCSI-controller problems
> Content-Type: text
> Content-Length: 1994
>
>
> jr> main board chip set is HiNT.
>
> I seem to recall that the HiNT chipset was not a true EISA chipset in most
> motherboard implementations. Perhaps that is what's causing the problems.
>
> Leonard
>
> From the PC-Hardware FAQ:
>
> Q) 2.43 What disadvantages are there to the HiNT EISA chip set?
> [From: ralf@wpi.wpi.edu (Ralph Valentino)]
>
> The HiNT Caesar Chip Set (CS8001 & CS8002) can come in three different
> configurations. All three of these configurations have EISA style
> connectors and are (sometimes incorrectly) sold as EISA motherboards.
> The differences should be carefully noted, though.
>
> The rarest of these configuration uses a combination of the first HiNT
> chip (CS8001) and the Intel chip set. This configuration can support
> the full EISA functionality: 32 address bits, 32 data bits, level
> sensitive (sharable) interrupts, full EISA DMA, watch dog (sanity)
> timer, and so forth.
>
> The second configuration is called Super-ISA, which uses both of the
> HiNT chips. This configuration is very common in low-end models. It
> supports a very limited functionality: 24 address bits, 32 data bits,
> edge triggered (non-sharable) interrupts, ISA (16 data, 24 address)
> DMA, and no watch dog timer. Some EISA boards, such as the Adaptec
> 1742A EISA Fast SCSI-2 host adapter, can be configured to work in this
> mode by hacking their EISA configuration file (.CFG) to turn off these
> features. Other EISA cards require these features and are therefore
> unusable in these systems.
>
> The final configuration is called Pragmatic EISA, or P-EISA. Like
> Super-ISA, both HiNT chips are used but external support logic
> (buffers and such) are added to provide a somewhat increased
> functionality: 32 address bits, 32 data bits, edge triggered
> (non-sharable) interrupts, ISA (16 data, 24 address) DMA, and no watch
> dog timer. The full 32 bits for address and data allow bus mastering
> devices access to the complete range of main memory. As with
> Super-ISA, there may be incompatibilities with some EISA cards.
>
+-----------------------------------------+-----------------------------------+
| Jarrett L. Redd | This document is not an official |
| Orbital Systems Engineer | MDAC-SSD release. Contents are |
| Automation and Robotics Group | guaranteed NON-CONFIDENTIAL. The |
| McDonnell-Douglas Aircraft Corporation | views expressed within are the |
| Space Station Division (MDAC-SSD) | private opinions of the author. |
+-----------------------------------------+-----------------------------------+
