[897] in linux-net channel archive
Re: patch for skbuff.c
daemon@ATHENA.MIT.EDU (Ralf Baechle)
Sun Aug 13 22:34:48 1995
To: submit-linux-dev-net@ratatosk.yggdrasil.com
From: ralf@rio.waldorf-gmbh.de (Ralf Baechle)
Date: 13 Aug 1995 20:24:10 GMT
In article <NAA08348@sys3.pe1chl.ampr.org> you write:
>According to Felix A. KOOP:
>> after reading the source of skbuff.c I'm not quite sure why there are
>> not cli()/sti() pairs on all accesses to the global variables. I included
>> a patch for the rest. If it's not neccessary, perhaps you can tell me why?
>>
>> diff -u skbuff.c.old skbuff.c
>> --- skbuff.c.old Thu Aug 10 08:41:27 1995
>> +++ skbuff.c Thu Aug 10 08:53:04 1995
>> @@ -446,7 +446,10 @@
>> if (skb->lock)
>> {
>> skb->free = 3; /* Free when unlocked */
>> + save_flags(flags);
>> + cli();
>> net_free_locked++;
>> + restore_flags(flags);
>> return;
>> }
>
>Well, at least on the x86, the code that GCC generates for incrementing
>a global variable is only a single instruction. As a single instruction
>cannot be interrupted halfway, there is no need to disable interrupts.
>
>Of course, it may be different on other processors...
It IS different on other architectures. At least MIPS but probably all RISC
architectures (load/store architectures) need multiple instructions. Strongly
optimizing compilers or assemblers should even insert other instructions in
the generated sequence of three instructions
lw t0,net_free_locked
addiu t0,1
sw t0,net_free_locked
to improve instruction scheduling. For other RISC processors the generated
code probably looks similar. Aside of that neither Kernighan & Ritchie
nor ANSI nor GCC guarantee ++ or -- to be atomic operations. I suggest
to use a set of new macros called atomic_increment_<type>(),
atomic_decrement_<type>() for that purpose. For least for Alpha and MIPS
which have "Load Linked"/ "Store Conditional" this could avoid disabling
interrupts.
Ralf
--
Ralf Baechle
Internet: ralf@waldorf-gmbh.de
Voice: ++49-2636-80294
