[131924] in North American Network Operators' Group
Re: RINA - scott whaps at the nanog hornets nest :-)
daemon@ATHENA.MIT.EDU (Jack Bates)
Mon Nov 8 11:49:10 2010
Date: Mon, 08 Nov 2010 10:48:53 -0600
From: Jack Bates <jbates@brightok.net>
To: Tony Finch <dot@dotat.at>
In-Reply-To: <alpine.LSU.2.00.1011081552070.8553@hermes-2.csi.cam.ac.uk>
Cc: nanog@nanog.org
Errors-To: nanog-bounces+nanog.discuss=bloom-picayune.mit.edu@nanog.org
On 11/8/2010 9:56 AM, Tony Finch wrote:
>
> I note that he doesn't actually describe how to implement a large-scale
> addressing and routing architecture. It's all handwaving.
>
That's an extremely hard to address problem. While there are many
proposals, they usually do away with features which we utilize. I'm
looking at a graph on the noc screen right now which shows how grotesque
natural load balancing can be between 3 AS interconnects. I have enough
free overhead to allow this, but eventually I will have to start
applying policies to balance better. This implies that I'll eventually
have to advertise sub-aggregate v6 prefixes to balance as well (perhaps
some /31 or /32 announcements overlaying the /27).
The problem with most of the other methods are they ignore policies and
the desired route to reach a network, and instead rely on any way to get
there. But let's be honest, the current problems tend to be memory
problems, not performance problems. It annoys me that vendors did this
last increment in such a small scale guaranteeing we'll be buying new
hardware again soon.
Jack
