[127779] in North American Network Operators' Group
Re: Vyatta as a BRAS
daemon@ATHENA.MIT.EDU (Dobbins, Roland)
Wed Jul 14 03:25:27 2010
From: "Dobbins, Roland" <rdobbins@arbor.net>
To: NANOG list <nanog@nanog.org>
Date: Wed, 14 Jul 2010 07:24:49 +0000
In-Reply-To: <alpine.DEB.1.10.1007140829090.9875@uplift.swm.pp.se>
Errors-To: nanog-bounces+nanog.discuss=bloom-picayune.mit.edu@nanog.org
On Jul 14, 2010, at 1:34 PM, Mikael Abrahamsson wrote:
> CRS-1 uses multicore processors (hundreds of cores) for forwarding on th=
eir linecards, and they achieve 40+ Mpps per linecard.
The CRS-1 makes use of the Metro subsystem for forwarding, with multiple Me=
tros per Modular Service Card (MSC). Each Metro complex (there are two per=
MSC) consists of the Metro chip itself, an NPU which contains 188 embedded=
RISC cores; two TCAM banks; SRAM; and FCRAM.
There's also a gatekeeper ASIC of some sort on the MSC which handles traffi=
c incoming from the fabric, as well as another interface module ASIC on the=
Physical Layer Interface Module (PLIM).
I believe the CRS-3-specific MSCs each contain two QFAP complexes, which al=
low for 140gb/sec per linecard, and that there are various additional suppo=
rting ASICs on the MSCs and the PLIMs, as well.
-----------------------------------------------------------------------
Roland Dobbins <rdobbins@arbor.net> // <http://www.arbornetworks.com>
Injustice is relatively easy to bear; what stings is justice.
-- H.L. Mencken
