[106312] in North American Network Operators' Group
Re: Software router state of the art
daemon@ATHENA.MIT.EDU (Petri Helenius)
Sat Jul 26 13:41:18 2008
Date: Sat, 26 Jul 2008 20:40:54 +0300
From: Petri Helenius <petri@helenius.fi>
To: William Herrin <herrin-nanog@dirtside.com>
In-Reply-To: <3c3e3fca0807231351i5f2fc6f4g4a670e0f405342c3@mail.gmail.com>
Cc: Naveen Nathan <naveen@lastninja.net>, nanog@merit.edu
Errors-To: nanog-bounces@nanog.org
William Herrin wrote:
> "ethtool -c". Thanks Sargun for putting me on to "I/O Coalescing."
>
> But cards like the Intel Pro/1000 have 64k of memory for buffering
> packets, both in and out. Few have very much more than 64k. 64k means
> 32k to tx and 32k to rx. Means you darn well better generate an
> interrupt when you get near 16k so that you don't fill the buffer
> before the 16k you generated the interrupt for has been cleared. Means
> you're generating an interrupt at least for every 10 or so 1500 byte
> packets.
>
This is not true in the bus master dma mode how the cards are usually
used. The mentioned memory is used only as temporary storage until the
card can DMA the data into the buffers in main memory. Most Pro/1000
cards have buffering capability up to 4096 frames.
Pete
