[7192] in cryptography@c2.net mail archive
Re: NSA back doors in encryption products
daemon@ATHENA.MIT.EDU (David Honig)
Thu May 25 23:56:59 2000
Message-Id: <3.0.6.32.20000525091810.00810200@pop.sprynet.com>
Date: Thu, 25 May 2000 09:18:10 -0700
To: Eugene Leitl <eugene.leitl@lrz.uni-muenchen.de>,
Jim Choate <ravage@einstein.ssz.com>
From: David Honig <honig@sprynet.com>
Cc: Eugene Leitl <Eugene.Leitl@lrz.uni-muenchen.de>,
Rick Smith <rick_smith@securecomputing.com>,
"Arnold G. Reinhold" <reinhold@world.std.com>,
John Gilmore <gnu@toad.com>, cryptography@c2.net, gnu@cygnus.com
In-Reply-To: <14636.30379.44116.968436@lrz.uni-muenchen.de>
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At 05:41 PM 5/24/00 -0700, Eugene Leitl wrote:
>
>True. You can always validate a few from a batch by plasma etching the
>device, and trace the structures on an electromicrograph (some EMs
>allow you to observe the device in operation).
NB: IBM has a way of viewing IR emitted by switching transistors
through the die.
>Also, it is hard to insert a trapdoor into an FPGA. OpenSource hardware.
Certainly much easier than stripping an ASIC, and the RTL to FPGA
tools are much simpler than ASIC synthesis and layout. Best put your
config in a ROM so as to avoid those trojan flashmemory upgrades... which was
the original intent of this thread..
