[12979] in cryptography@c2.net mail archive
Re: Via puts RNGs on new processors
daemon@ATHENA.MIT.EDU (David Honig)
Tue Apr 8 14:04:10 2003
X-Original-To: cryptography@wasabisystems.com
X-Original-To: cryptography@wasabisystems.com
Date: Tue, 08 Apr 2003 10:59:01 -0700
To: cryptography@wasabisystems.com
From: David Honig <dahonig@cox.net>
In-Reply-To: <87fzot9d10.fsf@snark.piermont.com>
At 12:20 PM 4/8/03 -0400, Perry E. Metzger wrote:
>
>The new Via Technologies x86 clone processors appear to have on-board
>cryptography support, including a hardware random number generator.
>
>http://www.via.com.tw/en/Digital%20Library/PR030122Nehemiah.jsp
Sec 3.1:
When exiting low-power mode, the contents of the shift register are
discarded and the next complete byte destined for the shift register is
also discarded. ^^^^ ^^^^^^^^^^^^^
Did they mean "bit" vs "byte"?
Or did they mean "FIFO" instead of "shift register"? [I think so]
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